Monday, August 4, 2014

What is HDL ?

Hardware description language (HDL) plays a vital role in very large scale integration (VLSI). HDLs looks much like a programming language C.  HDL   is textual description of an electronic circuit or  electronic chip.  In other words HDL is used  to describe hardware in terms of expressions and statements, control structures.  HDL is concurrent (all parts work at the same time)whereas traditional software is sequential. HDL is real time sensitive unlike software.  HDL  also allows for the compilation of an HDL program into a lower level specification of physical electronic components, such as the set of masks used to create an integrated circuit.

 HDL has ability to describe and simulate at behavioural, structural and mixed level. From above description we can say that HDL form an integral part of electronic design automation system,  specially for complex circuits such as microprocessor. Now we will know  more about HDLs. There are two types of HDL which is supported by IEEE. They are VHDL  ( Very high speed integrated circuit HDL) and Verilog HDL. These language are used in electronic devices that do not share computer’s basic architecture.

For high level modeling VHDL is  better while Verilog is better  for gate level modeling and switch level modeling. VHDL is not case sensitive while Verilog is case sensitive. Verilog is similar to C or PASCAL  language while VHDL is similar to ADA programming language in syntax. VHDL is more complex then  verilog. VHDL has the advantage of having a lot of constructs that aid in high level modeling. Verilog is easy to understand and easy  to  design. VHDL is different from Verilog in terms of signal assignment, interface declaration, in RTL assignment.  Verilog is much better then VHDL below the RTL level.  VHDL and Verilog is equivalent for RTL modeling. But the bottom line is that we should know both.


Verilog-HDL

Tags : HDLVerilog ,     VHDL ,     RTL ,     FPGA Vs ASICVerilog Training 


Author - Trisha Jain
(Intern at Silicon Mentor)