Friday, February 27, 2015

Top 25 Rules to write High Impact Factor IEEE Conference/Transaction Papers

Every Researcher or student want to publish their work in one of the best publishing houses but maximum of them get depressed because of the initial long span of correction of the paper in IEEE like publication, because most of the IEEE papers are not organized in  proper format. This disorganized paper either takes more than a year to publish or gets rejected. In this article we have given top 25 keys to publish a highly recognizable paper. 

The rules are given as follows:


1)       Writing a good paper needs good writing skills.
2)       Before writing a paper, review some good papers published by well established and reputed authors.
3)       The title should clearly reflect motive of the research.
4)       Primer contributor should be the first author.
5)       The co-authors should be on the basis of amount of their contribution in the work.
6)   It is not supposed to add the name of HOD or financial supporter until or unless they have made any contribution in the research work.
7)      Carefully check your paper or work for plagiarism i.e. should not be publishing many of the paper on the same idea or work.
8)       Collect the references on which the work is based for the proper citation of the paper.
9)       Add especially few extra references and two to three relevant books to the subject.
10)   Add figures which should be explanatory and convey clear distributions in the paper.
11)   While using the graphs grid should be light in color with clear variable distribution and scale.
12)   While writing the paper equation is the most important segment of the paper. Therefore while writing equations one should use proper symbols with local definition of the symbols.
13)   The derivations which are necessary should be induced briefly in the appendix.
14)   Organize all the points in detail and in proper sequence for each section and sub-section before starting the writing work.
15)   Especially for non English countries check the English composition spelling and grammar.
16)   Sometimes the average technical papers are accepted in good publication because of their excellent writing.
17)   Abstract should completely focus on work.
18)  After abstract the first thing is to give introduction of the work. The introduction should denote the general importance of your work and the overview of preliminaries of the research.
19)   Next step defines the contribution of the past work with the reference of the past work on which your work is based. After this you need to prove that, why your work is is unique or better than the conventional work.
20)   After writing the introduction, the remaining steps should consist of crystal clear and very simple description of the required content in a logical manner.
21)   Finally the results and significance of the work will be discussed in conclusion.
22)   An acknowledgement should be included after conclusion if you have taken help from others to complete your work.
23)   After writing the full draft, iterate it several times for improvement and to give final touch for polishing of written English.
24)  Check for all figures are clear or not and draw all the block diagrams using proper tools instead of attaching snapshots.
25)   In last check for everything id it is expressed correctly, clearly and logically. And most importantly check for all relevant references and paper formatting length.

Thursday, February 26, 2015

Beginning with FPGA Implementation of SVM Algorithm

SVM algorithm is perhaps most widely used classification algorithm due to its ability to handle high dimensional feature space. As the portable systems are getting smarter and computational efficient, there is a growing demand to use efficient machine learning algorithms. Thus we need to use low power and high speed embedded products for proper execution of large computations in real time. Since most of the micro controller cores cannot handle such high computations in real time due to its sequential execution of instructions and low frequency. Here FPGAs come to rescue that can be used as standalone systems without need to use general purpose processors and its ability to handle large computations by parallel execution of data. 

    Basic overview of SVM



Support vector machines are widely used binary classifiers known for its ability to handle high dimensional data that classifies data by separating classes with a hyper-plane by maximizing the margin between them. The data points that are closest to hyper-plane are known as support vectors. Thus the selected decision boundary will be the one that minimizes the generalization error (by maximizing the margin between classes).
For the linearly separable case, it does so by minimizing the following objective function:


Thus the optimal solution is given by-
                                                          

A new test example x is classified by the following function:



Here is the Lagrange multiplier.
For the non-linear input space, we use kernel functions.
Some of the widely used kernels are:



 







For more information related to SVM, just follow this link:


FPGA implementation of Support Vector Machines

 

In most of the applications, input data is first applied to a feature extraction unit that extracts relevant information from input data. This data is then applied to SVM to train itself. This training phase is a onetime process, thus this phase is often executed using standard software packages. This training finds support vectors in input data and gives its weights and bias coefficient. This information can be stored in FPGA’s memory block.

Whenever a new data sample comes, these support vectors are loaded from memory and performs the following operation:

Any of the above described kernel function can be used.

Here a large number of multiplication functions are executed, thus we need to exploit parallel architecture of FPGA to make it suitable for real time applications by using a number of MAC units that performs its execution in parallel.

Another issue in FPGA realization is synchronization where next input should come only after the execution of SVM testing on prior input. Thus we need to use proper synchronization mechanism to ensure sufficient execution of SVM by using a number of buffers to store inputs temporarily. If numbers of support vectors are large, this problem would be even worse to handle. By proper static timing analysis, its maximum clock frequency can be determined. Most of the FPGAs provide on chip PLLs that can be used to generate higher clock frequencies above the oscillator’s frequency.

Realization of parallel architecture would also increase device’s power consumption. Thus we need to care about speed-power trade off.

The most important thing in designing any FPGA based logic is to design proper interfacing circuits to handle real world data. Most of the FPGA boards provide basic interfacing with some standard input data types but we have to use proper buffering and pre-processing on input data to make it suitable for SVM.

Tuesday, February 24, 2015

Support for PhD thesis/Dissertation

The Engineering researcher, students and professional all passes through an important part of the education system. Those who want to add value in their work they should do their projects in an efficient and convenient way. They should understand one thing which is most important while choosing a VLSI Project and PhD thesis which is “the work should be contributed towards to the enhancement and development of the society.” 

Silicon Mentor is a VLSI and AI based Research and Development Company which helps VLSI and AI student, Researcher to complete their research work under the guidance of experienced professionals. There are various sub-domains of VLSI projects and PhD thesis where Silicon Mentor has worked. Some of the areas are mentioned below.

Low Power VLSI projects one of the most useful areas. We have worked on different Low power design techniques from device level to circuit topologies. Other sub-domains of VLSI projects mainly focus on mixed signal based device circuit designing. The exponentially increasing technology also needs new hardware which will be convenient platform to implement some of the critical AI based algorithm. 

Therefore to overcome these tradeoffs silicon mentor working on many PhD thesis and VLSI project to get or innovate a new idea. So come and make a contribution for the development of society and add value to your research.