Digital signal processing is the most challenging field of research. It has replaced the conventional analog signal processing with an advantage of low error probability and high SNR. Digital signal processing adds high speed processing capabilities to the system with an overhead of analog to digital and digital to analog conversions. FPGA (field programming gate array) has bough revolution in signal processing system development due to its parallel implementation capabilities with throughput in multiple Gigabits/sec.
FPGAs are best suited not only for combination or sequential logic implementation; these are optimum for high speed signal processing as well. PhD or M.Tech scholars can carry their research in DSP a step further by implementing their designs in real time using DSP oriented FPGAs. The DSP slices and dedicated blocks on FPGA accelerate performance of FPGAs and makes system development easy and accurate.
A brief idea of design flow used for DSP system is:
- system modeling on Simulink
- simulation (with floating point data)
- Data type conversion (to fixed point)
- Hardware implementation and simulation
System modeling is the first step in design of system where behavioral blocks, transforms, delay elements etc. are used to model the Digital Signal Processing system which is then verified for desired performance. Till now the data types used are of floating point precision. To implement this on hardware we need to convert this system to work on fixed point data types so that the system can be implemented on hardware efficiently. The width of coefficient is quantized and fixed in this process. Now the design is written in HDL and mapped to hardware. The hardware is then simulated to check the performance with quantized coefficients and fixed word lengths. If the performance is satisfactory the design is finalized otherwise the conversion is carried out again.