Friday, January 8, 2016

VLSI Projects List for Thesis

  1. A Clock less, Multi-Stable, CMOS Analog Circuit.
  2. An Improved Design of Key Analog Circuits in CMOS Image Sensor
  3. Frequency Compensation in Two-Stage Operational Amplifiers for achieving High 3-db Bandwidth.
  4. Circle Equation-Based Fault Modeling Methodfor Linear Analog Circuits.
  5. Indirect Miller Effect Based Compensation in Low Power Two-Stage Operational Amplifiers.
  6. Analog Circuit Design Using Tunnel-fets.
  7. Ultra-Low-Voltage Operation ofCMOS Analog Circuits: Amplifiers,Oscillators, and Rectifiers.
  8. N-Channel Dual-Workfunction-Gate MOSFET forAnalog Circuit Applications.
  9. Steady State Computation and Noise Analysis of Analog Mixed Signal Circuits.
  10. New Possibilities and Trends in Circuit Design for Analog Signal Processing.
  11. Offset Reduction in Operational Amplifiers using Floating Gate Technology and LMS Algorithm.
  12. A  Method  of  Analog  Circuit  Optimization  Using Adjoint  Sensitivity  Analysis
  13. Area and power optimized multipliers with minimum leakage.
  14. Comparison and analysis of combinational circuits using different logic styles.
  15. Combinational circuits without false paths.
  16. Fast 32-bit digital multiplier.
  17. Fully cmos programmable voltage adder/subtractor.
  18. Optimization of combinational logic circuits through decomposition of truth table and evolution of sub-circuits.
  19. Low-power design techniques for high-performance cmos adders.
  20. Variable input delay cmos logic for low power design.
  21. Analysis of metastability performance in digital circuits on flip-flop.
  22. A translinear-based implementation of digital logic gates using only cmos in current-mode.
  23. Optimized power performance and simulation of reversible logic multiplexer.
  24. Vlsi implementation of reduced complexity wallace multiplier using energy efficient cmos full adder.
  25. An improved design of combinational digital circuits with multiplexers using genetic algorithm
  26. Mixed-Signal VLSI Design in 0.5μm Process of Nano-Power Subcompact Mirror Amplifier for Accusensor.
  27. CMOS Current Steering Logic for Low-Voltage Mixed-Signal Integrated Circuits.
  28. A 3.8-ns CMOS 16 x 16-b Multiplier Using Complementary Pass-Transistor Logic.
  29. The Design of A Low-Power Low-Noise Phase Lock Loop.
  30. Ultra-High Bandwidth Fully-Differential Three-Stage Operational Amplifiers in 40nm Digital CMOS.
  31. Wide Output Swing Inverterfed Modified Regulated CASCODE Amplifier for Analog and Mixed-Signal Applications.
  32. A Digital-Based Analog Differential Circuit.
  33. A low open-loop gain, high-PSRR, micro power CMOS amplifier for mixed-signal applications.
  34. Circuit Techniques for CMOS Low-Power High-Performance Multiplier.
  35. An Efficient Mixed-Signal 2.4-ghz Polar PowerAmplifier in 65-nm CMOS Technology.